Modelling and Verification of RBC Handover Using CSP

Bashar Igried

(Swansea University)

This paper proposes the modelling and verification of the RBC/RBC Handover using the process algebra communicating sequential processes (CSP). We then use the model checker FDR2 to check if it is free from Deadlock and Livelock.
Thursday 16th October 2014, 12:00
Robert Recorde Room
Department of Computer Science